Constant quantizing scale method of transmitting a signal

ABSTRACT

A method of transmitting a voice frequency spectrum which comprises a plurality of frequency channels wherein in each channel there is a voltage signal whose amplitude represents the intensity of a different discrete frequency component of the spectrum. The voltage signals of all channels are simultaneously compared against an exponentially decreasing reference voltage until an equality is obtained between the reference voltage and the voltage signal of the channel having the greatest intensity. A binary-coded representation of this intensity is recorded. Thereafter, binary-coded representations of the differences between the intensities of the channels with respect to the maximum intensity are recorded. These differences are also obtained by comparing the voltage signals of the channels with the reference voltage which is still exponentially decreasing.

United States Patent Vollmer et al.

[ 51 Jan. 25, 1972 [72] Inventors: Burghardt Vollmer, Vendelso; Ulf Lindback, Tyreso, both of Sweden Telefonaktiebolaget LM Stockholm, Sweden 22 Filed: Jan. 14,1970

211 Appl.No.: 2,815

[ 73] Assignee: Ericsson,

Related US. Application Data [63] Continuation-impart of Ser. No. 644,223, June 7,

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Warns ..179/1 SA Kaneko ..340/347 Primary Examinerl(athleen H. Claffy Assistant Examiner.lon Bradford Leaheeg Att0rney-Hane, Baxley & Spiecens [5 7] ABSTRACT A method of transmitting a voice frequency spectrum which comprises a plurality of frequency channels wherein in each channel there is a voltage signal whose amplitude represents the intensity of a different discrete frequency component of the spectrum. The voltage signals of all channels are simultaneously compared against an exponentially decreasing reference voltage until an equality is obtained between the reference voltage and the voltage signal of the channel having the greatest intensity. A binary-coded representation of this intensity is recorded. Thereafter, binary-coded representations of the differences between the intensities of the channels with respect to the maximum intensity are recorded. These differences are also obtained by comparing the voltage signals of the channels with the reference voltage which is still exponentially decreasing.

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This invention is a continuationdn-part application based on our copending application Ser. No. 644,223 filed June 7, 1967 now abandoned.

This invention relates to the transmission of varying voltage spectra such as voice frequency spectra associated with speech.

The transmission of voice frequency spectra is often associated with a vocoder wherein each frequency component or channel is quantized and represented by a coded combination of pulses indicating a binary number having a value associated with the intensity of a frequency component. The pulse combinations are then transmitted to a receiver and reconverted to analog signals. When the transmission link places an upper limit on the pulse or data rate only coarse quantizing can be performed and a restriction is placed on maintaining the dynamic range of the signals being quantized. When handling speech it has been observed that the dynamic range of intensity levels between different speakers is in the order of 40 db. Furthermore, there is a db. difference in the speech spectrum between different formants. Thus, any

vocoder system must have a dynamic range of about 60 db. to

handle the voice transmission of most people. However, by using compressor amplifiers at the input of the system 20 db. may be saved, but this still leaves a dynamic range requirement of 40 db.

When low-data rates' are encountered it has been found that no more than three pulse times can be assigned to each frequency component in an 18 channel system. At the most, three pulse times can represent the binary values from zero to seven. Therefore, only seven actual quantizing levels can be represented. These seven levels must represent a 40 db. range. Therefore, a linear quantizing would be very coarse and would lead to severe distortion.

Heretofore, there has been proposed a method wherein weighted intensities of all channels are summed to provide an absolute level which is then quantized and used to control the sensitivity of the quantizers for the frequency channels. However, there is still considerable quantizing distortion since it is diflicult to weight properly the intensities of each of the frequency channels before performing the summation.

It is accordingly an object of the invention to provide an improved method of quantizing information representing the various channel components of a signal spectrum.

Briefly, the invention contemplates first quantizing the intensity of the channel having the greatest amplitude value and then quantizing the intensities of the remaining channels with respect to this greatest amplitude value.

Other objects, features and advantages of the invention will be apparent from the following detailed description when read with the accompanying drawing, wherein:

FIG. 1 shows a block diagram of a system for transmitting a quantized signal spectrum according to the invention;

FIG. 2 is a diagram of a frequency spectrum;

FIG. 3 is a graph of the waveform of a reference voltage used in the system of FIG. 1; and

FIG. 4 shows pulse waveforms used in the binary representation of the quantizing levels.

The system according to FIG. I transmits, from a transmitter or sender S to a receiver R, 18 individual channel voltages associated with a channel vocoder, for example. Each of the channel voltages is fed to one of the comparators Al-Al8 where it is compared with a logarithmically decreasing reference voltage E obtained from, for example, a RC-circuit (not shown).

FIG. 2 shows diagrammatically the 18 voltage amplitudes of a vocal tone (vowel"), for example, an a," whose amplitudes are to be quantized, i.e., their values in relation to each other, are to be represented by three-digit binary numbers. The reference voltage 5,; decreases exponentially from a maximum value as indicated in FIG. 3. Associated with each of the comparators AlAl8 is one of the bistable circuits Bl-B18 which is set to l-condition when obtaining a signal from its associated comparator as an indication that amplitude of the input voltage coincides with the exponentially decreasing reference voltage. The outputs from the l-positions of all bistable circuits B1-Bl8 are connected to an OR-circuit C that produces an output signal as soon as one of its 18 inputs has been activated. This output signal is fed to one of the inputs of an AND-circuit 0, whose second input is fed counting pulses from a clock pulse source KL. When the comparing period begins, which occurs after the setting of all bistable circuits 31-318 to the zero-position, the decreasing of the reference voltage and also the counting of the clock pulses are started. The counting is carried out by means of a main counting chain F which receives the counting pulses via AND-circuit E as long as its second input is activated when the bistable circuit D is in the lposition. When, during the decrease of the reference voltage, coincidence arises between the reference voltage and the channel voltage having the greatest amplitude, the bistable circuit of the comparator associated with this greatest channel voltage-amplitude will be set to l-position. Accordingly, the output signal of the OR-circuit C activates the AND-circuit 0. Thus, the bistable circuit D will be set to the l-position so that no more counting pulses pass to the main counting chain F. The number of pulses counted before the coincidence with the reference voltage determines the value of the greatest amplitude in relation to the reference voltage. The setting of the bistable circuit D to the l-position triggers the bistable circuit G to the zero-position which opens AND-circuit H to pass clock pulses. The clock pulses from the output of the AND-circuit H are fed to AND-circuits Kl-Kl8, the second inputs of which each obtain a signal from its associated bistable circuit Bl-B18. All but one of these bistable circuits is set to the zero-position, the odd one having been set to l-position upon coincidence between the channel amplitude voltage and the reference voltage. Associated with each of the AND-circuits Kl-Kl8 is a channel counting chain Ll-Ll8. All of the chains Ll-Ll8 except the one associated with the one of the bistable circuits Bl-Bl8 that is set to the 1- position now starts counting clock pulses. As soon as coincidence has occurred between the reference voltage and the subsequent amplitude value for any channel, its associated bistable circuit Bn will be set to the l-position and the counting in the corresponding one of the channel counting chains Ll-LIS ceases. The main counting chain F and the channel counting chains Ll-Ll8 form a memory whose contents will be read and transmitted in binary form as will be explained below. After seven counted clock pulses, the counting chain J delivers a pulse that blocks the AND-gate H via an AND-circuit D and the bistable circuit G, i.e., bistable circuit G is set to the zero-position. Consequently, each of the AND-circuits Kl-Kl8 can only count at maximum of seven clock pulses if it has not been stopped earlier by coincidence detection.

The related waveforms are shown in FIGS. 3 and 4. FIG. 3 shows the waveform of the reference voltage during the comparing period. The time constant for the discharge circuit of the reference voltage is chosen in such a way that the reference voltage decreases by a 3 db. quantum between each clock pulse. Consequently, the counting chains Ll-Ll8 of the channel coders contain information concerning how many 3 db. quanta below the level of the greatest amplitude channel the respective channel signal voltage is situated.

If a channel is 21 db. below the greatest amplitude channel its counting chain L will have counted to seven. If the voltage amplitudes of all channels should be zero, the bistable circuit D is not activated by the output of the OR-circuit C and the counting chain F would continue to count. In order to prevent this, the bistable circuit D will be activated by the AND-gate M when the counter F has reached its maximum digit value. FIG. 4 when read with FIG. 3 shows that the counting in the counting chains L is started when coincidence has been found between the reference voltage and the greatest amplitude channel voltage. If, presupposing as an example, that coincidence between the reference signal and the channel signal has been found at the fourth clock pulse, the counting of the channel counting chains will be started with the fifth clock pulse. If, for example, a number of channels have an amplitude that is 3 db. lower than the greatest amplitude, the counting chains belonging to these channels will indicate the digit 1 in binary form as is symbolically indicated in FIG. 3. If, for example, channels are found having signal amplitudes which lie db. under the greatest amplitude, the counting chains of these channels will be set to the digit 5 in binary form.

Reading of the digit values can occur in parallel or serial form. According to the example, the reading takes place serially, the l-outputs from each of the stages of the counting chains Ll-Ll8 being connected each to its own AND-circuit SM1-SM57, the second inputs of which are connected to a scanning matrix WS.

The scanning matrix WS is of a type known per se, for example, a diode matrix having 64 outputs M1M64, which in turn are activated by a binary chain consisting of six stages which counts clock pulses from source KL. Upon activation of the outputs Ml-M57 an output pulse is obtained in turn from each of the AND-circuits SMl-SM57 whose inputs are connected to a stage in a counting chain which has been set to l and through an OR-circuit T and a transmission line are supplied to the receiver R. The outputs M58-M64 of the matrix WS are used for different purposes, for example the pulse from the output M58 is used for zero-setting of all circuits in the sender S, and output M60 can be used to start clock KL which samples the channels. It should be noted that the pulse repetition rate of clock KL is faster than for clock KL. In fact, 64 clock pulses of clock KL can occur in the interval between a pulse at the output M60 and a pulse at the output M64.

On the receiver side the signals are restored to its original form. The digit values transmitted in serial form according to the example, are stored in a memory consisting of bistable circuits MRlMR57. There is associated with each of the bistable circuits an AND-circuit RMl-RM57, the output signal of each of these circuits sets the respective bistable circuit into the l-condition. Each of the AND-circuits RM has one of its inputs connected to an AND-circuit Z whose two inputs receive the serial input pulses and a clock signal from the clock device KL, respectively. Clock device KL is similar to the clock device KL in the sender S and in synchronism therewith. The incoming pulses appear on the input of each of the AND-circuits RM. However, only one of these circuits can produce an output signal at any one time, viz, that one of the circuits whose second input simultaneously receives an output pulse from a counting matrix WR. Matrix WR is identical with the matrix WS in the sender S and is stepped forward by means of a counting chain, so that a signal is obtained for each clock pulse at one of the outputs Ml-M57 corresponding to a definite bistable circuit MR. In this way the bistable circuits MRI-MR57 are set in correspondence with the pulses received from sender S.

The receiver R comprises 19 DA or digital-to-analog converters, one DA converter AKM for the decoding of the maximum amplitude and 18 DA converters AKl-AK18 for each of the channels. Each of the DA converters includes a resistance chain DAM, DAl-DA18, known per se, for digitalto-analog conversion. Each resistance chain produces an attenuation which is dependent on the number of connected resistance links. Each connected link contributes to the attenuation with a value corresponding to its position in the chain. Each chain, by way of example, has three links with the attenuations 3, 6 and 12 db. The attenuation expressed in decibel will be seven times greater when all the three links are connected than if only the first link is connected. To each DA converter AKM and AKl-AK18 respectively, belongs a group of three bistable circuits FR which correspond to the counting chains F and Ll-Ll8, respectively, in the sender. Each of the bistable circuits cooperates with a definite bistable circuit MR1-MR57 in the receiver. Upon reception of the signals, those bistable circuits MRl-MR57 which have obtained a lsignal will be activated and set to the l-condition while the other bistable circuits remain in the zero-position. After all bistable circuits have been activated, i.e., the digit values of a whole staticizing or serial-to-parallel conversion period are written in the circuits MRI-MR57, all these circuits will be force set to the zero-condition and a useful signal is obtained from all such bistable circuits MRl-MR57 which were set to the l-condition while from those circuits which have been set to the zero-condition no useful signal will be obtained.Only those bistable circuits FR which received useful signals from their associated bistable circuits MR will be set to the l-position and emit a signal. This operation is obtained through the agency of a logic circuit. The logic circuit comprises an AND- circuit OKl, 0K2, etc., and an inhibiting circuit [H l, lH2, etc. All these circuits obtain the zero-setting signal simultaneously with the bistable circuits MRl-MR57 but they also receive an output signal from those circuits MRI-MR57 which have received an l-signal. The arrangement is such that if, besides the zero-setting signal, a signal from one of the circuits MR has also been obtained, the AND circuit becomes conducting while the inhibiting circuit will block. This implies that the respective bistable circuit in a group FR is set to the l-condition and from the bistable circuit in group FR an output signal will be obtained that closes the switch GR belonging to the respective digit position. Consequently, the corresponding link is connected to the attenuator. If no signal has been obtained from the bistable circuits MR, and the AND circuits will not be activated, the inhibiting circuits are opened and the bistable circuits in groups FR are set to the zero-condition. The switches GR are interrupted and the corresponding attenuator is disconnected. In accordance with what has been described above, the attenuators can be varied in 3 db. stages between 0 and 21 db. Furthermore, the attenuator contains a stage to provide an attenuation which is greater than 60 db. This is connected when the whole counting chain has counted to the end. In such a case all those channels in which the counting chain has counted to the end have the same level.

Upon D to A converting, the attenuator DAM belonging to the maximum channel amplitude is set by means of the digit information obtained from the counting chain F in the sender S, in such a way that it produces an attenuation of a reference voltage E to the same level which corresponds to the greatest amplitude in the frequency spectrum.

This voltage is supplied, via line E to the attenuators of the other 18 channels in the DA converters AKl-AK18. Since the counting chain of the greatest amplitude channel on the sender side did not count pulses and all its stages were set to the zero-condition, no attenuation in the associated DA converter AK of the output voltage from the DA converter AKM corresponding to the greatest amplitude will take place. On the other hand, the attenuators of the other channel DA converters AK will attenuate the output signal from the DA converter having the maximum amplitude by just as many 3 db. quanta as the number of counted clock pulses accumulated in the counting chain of the channels in the sender. Because of the fact that the bistable circuits of the DA converters have not been set to the zero-condition but only shift values if some change in relation to the preceding measuring value exists, the output signal consists of an abruptly varying DC voltage and not of amplitude modulated pulses. This is an advantage since the energy content becomes greater and the smoothing is facilitated.

By means of the arrangement described above there will be obtained maximum dynamic ranges of about 42 db. On a vocoder-PCM-connection having low-bit ratio, for example 2,400 bauds.

A further advantage with this parallel system is that all channels are coded at the same moment on the sender side, and, on the receiver side, the decoding also takes place at a time common to all decoders, while in a time division multiplex system coding and decoding respectively are distributed over the whole scanning period.

While the invention has been described in detail with respect to a certain now preferred example and embodiment of the invention, it will be understood by those skilled in the art, after understanding the invention, that various changes and modifications may be made without departing from the spirit and scope of the invention, and it is intended, therefore, to cover all such changes and modifications in the appended claims.

What is claimed is:

l. The method of processing a frequency spectrum represented by a plurality of channels wherein in each channel there is a voltage signal having an amplitude related to the intensity of a different frequency component of the spectrum, said method comprising the steps of selecting the voltage signal having the maximum amplitude of the voltage signals of all of said channels, representing the amplitude of said maximum amplitude voltage signal by a first coded combination of pulses, and representing only the difference between the amplitude of the voltage signals of each of the channels other than the channel having the maximum amplitude voltage signal and said maximum amplitude voltage signal by other coded combination of pulses, respectively.

2. The method of claim 1 wherein said selecting step comprises simultaneous comparing of the voltage signal of each of the channels with a reference voltage having an amplitude which decreases with time starting from a given time and selecting the voltage signal whose amplitude first coincides with the instantaneous amplitude of said reference voltage.

3. The method of claim 2 wherein the step of representing the amplitude of said maximum amplitude voltage signal by a coded combination of pulses comprises counting the number of equitime duration pulses occurring in the time interval between the start of the generation of said reference voltage and said amplitude coincidence and representing the numerical value of such count as a coded combination of pulses.

4. The method of claim 3 wherein the step of representing the difference between the amplitude of the voltage signals of each of the channels other than the channel having the maximum amplitude voltage signal and said maximum amplitude voltage signal comprises counting the number of equitime du ration pulses occurring in the time interval between the amplitude coincidence of the maximum amplitude voltage signal and the reference voltage signal and the amplitude coincidence of the voltage signals of each of said other channels and the reference voltage signal, respectively, and representing the numerical value of each of such counts as a coded combination of pulses.

5. The method of claim 1 further comprising the steps of transmitting said coded combinations of pulses to a remote receiver, at said receiver, digital-toenalog converting said first coded combination of pulses to a base voltage signal having an amplitude related to the value represented by said first coded combination of signals, and attenuating said base voltage signal by amounts related to the values represented by said other coded combination of pulses, respectively, to provide output voltage signals for each of the channels. 

1. The method of processing a frequency spectrum represented by a plurality of channels wherein in each channel there is a voltage signal having an amplitude related to the intensity of a different frequency component of the spectrum, said method comprising the steps of selecting the voltage signal having the maximum amplitude of the voltage signals of all of said channels, representing the amplitude of said maximum amplitude voltage signal by a first coded combination of pulses, and representing only the difference between the amplitude of the voltage sigNals of each of the channels other than the channel having the maximum amplitude voltage signal and said maximum amplitude voltage signal by other coded combination of pulses, respectively.
 2. The method of claim 1 wherein said selecting step comprises simultaneous comparing of the voltage signal of each of the channels with a reference voltage having an amplitude which decreases with time starting from a given time and selecting the voltage signal whose amplitude first coincides with the instantaneous amplitude of said reference voltage.
 3. The method of claim 2 wherein the step of representing the amplitude of said maximum amplitude voltage signal by a coded combination of pulses comprises counting the number of equitime duration pulses occurring in the time interval between the start of the generation of said reference voltage and said amplitude coincidence and representing the numerical value of such count as a coded combination of pulses.
 4. The method of claim 3 wherein the step of representing the difference between the amplitude of the voltage signals of each of the channels other than the channel having the maximum amplitude voltage signal and said maximum amplitude voltage signal comprises counting the number of equitime duration pulses occurring in the time interval between the amplitude coincidence of the maximum amplitude voltage signal and the reference voltage signal and the amplitude coincidence of the voltage signals of each of said other channels and the reference voltage signal, respectively, and representing the numerical value of each of such counts as a coded combination of pulses.
 5. The method of claim 1 further comprising the steps of transmitting said coded combinations of pulses to a remote receiver, at said receiver, digital-to-analog converting said first coded combination of pulses to a base voltage signal having an amplitude related to the value represented by said first coded combination of signals, and attenuating said base voltage signal by amounts related to the values represented by said other coded combination of pulses, respectively, to provide output voltage signals for each of the channels. 